This invention relates to a phase shifter.
Various applications in telecommunications require continuously variable phase shifters. Variable phase shifter designs typically rely on the use of delay lines of a specified electrical length, variable resistors, or variable reactance components.
It is often desirable to fabricate a phase shifter monolithically on an integrated circuit (IC). In such instance, components which can provide a reactance controlled by an applied voltage or current, such as varactor diodes and/or field effect transistors (FETs), may be used. However, some IC processes may not provide suitable components for such an application which presents a hurdle to their use in a monolithic IC (MIC) phase shifter. This is the case with many bipolar IC processes. Further, even for processes possessing the required variable reactance components, an architecture avoiding variable reactance components may be preferred.
A bipolar component phase shifter design which avoids variable reactances is disclosed in U.S. Pat. No. 4,833,340 issued May 23, 1989 to Deguchi. In Deguchi, a resistor-capacitor (RC) network splits an input signal, e.sub.in, into two signals, e.sub.1 and e.sub.2, each having a predetermined amplitude and phase shift with respect to the input signal dependent upon the values of the resistors and capacitors. These two signals are then applied to a Gilbert Cell Multiplier (GCM) which comprises three differential pair amplifiers, herein referred to as differential pairs. More particularly, e.sub.1 inputs a first differential pair of the GCM and e.sub.2 inputs a second differential pair of the GCM. The gain of these two differential pairs is driven by a phase shift control signal input via the third differential pair of the GCM. At the output of the device, e.sub.1 and an inverted version of e.sub.2 are vectorially summed to obtain e.sub.out which has a phase shift with respect to e.sub.in. In a complementary fashion, the gains of the first and second differential pairs can be adjusted to control the amplitude of e.sub.1 and e.sub.2 so that a selectable phase shift with respect to e.sub.in can be obtained.
There are a number of drawbacks to this design.
The frequency response varies drastically with phase control from a pure low-pass response at one extreme to a pure high-pass one at the other and at high frequencies it is strongly influenced by the input characteristics of the GCM. Further, the out-of-band gain is higher than the signal gain and very broad over most of the phase range. This can cause problems with noise, unwanted signals and harmonics, and their variation with phase control.
The subject invention seeks to provide a phase shifter which may be used with high frequency input signals and may be fabricated on a bipolar MIC.